Winner of a "Best in Show" Award at AOC Convention!
Two Xilinx® Virtex® UltraScale+™ XCVU9P/XCVU13P FPGAs with up to 29 GB of DDR4 DRAM for up to about 125 GB/s of DRAM bandwidth. Up to 8.7 million logic cells and 27,504 DSP slices per board. Also features two WFMC+ mezzanine I/O sites with stacking support, on-board Zynq Quad ARM CPU and two FireFly 4x transceivers.
High-bandwidth backplane connectivity is enabled by MULTIGIG RT3 interconnects, which deliver 100Gb per Fat Pipe. The new high-density RT3 boosts VPX backplane speeds to a remarkable 25 Gbaud, without sacrificing signal integrity.
Need the same SOSA-alignment and 100GbE capability in a smaller package? See the WILDSTAR 3XBP 3U OpenVPX Board.