Tag Archives: Virtex 7

The WILDSTAR Gen2 RTM for 3U OpenVPX, a member of the WILD40/WILD100 EcoSystem™ for OpenVPX, performs high-speed, general-purpose I/O transfers between WILDSTAR OpenVPX Baseboards and other components. This hot-swappable card provides two USB ports, two Micro-D connectors, and three optional optical transceivers.

The LVDS RTM For 3U OpenVPX, a member of the WILDSTAR™ /VPX family of high performance Mezzanine Cards, performs high-speed, general-purpose I/O transfers between WILDSTAR /VPX motherboards and other components. The card provides up to 56 single-ended lines and 32 differential LVDS pairs between a WILDSTAR /VPX processing board and an external system.

Up to two Xilinx Virtex 7 FPGAs per board with VX690T or VX980T FPGAs, up to 8 GB of DDR3 DRAM for 51.2 GB/s of DRAM bandwidth or up to 64 MB of QDRII+ SRAM for 32 GB/s of SRAM bandwidth. Up to 1.9 million logic cells and 3.3 million multiplier bits per board. Air or Conduction Cooled.

Up to three Xilinx Virtex 7 FPGAs per board with VX690T or VX980T FPGAs, up to 8 GB of DDR3 DRAM for 51.2 GB/s of DRAM bandwidth and up to 128 MB of QDRII+ SRAM for 64 GB/s of SRAM bandwidth. Up to 2.9 million logic cells and 4.9 million multiplier bits per board. Air Cooled Only.

Up to three Xilinx Virtex 7 FPGAs per board with VX690T or VX980T FPGAs, up to 4 GB of DDR3 DRAM for 25.6 GB/s of DRAM bandwidth and up to 128 MB of QDRII+ SRAM for 64 GB/s of SRAM bandwidth. Up to 2.9 million logic cells and 4.9 million multiplier bits per board.

One VX690T or VX980T Virtex 7 FPGA per board with up to 2 GB of DDR3 DRAM for 12.8 GB/s of DRAM bandwidth and up to 32 MB of QDRII+ SRAM for 8 GB/s of SRAM bandwidth. Up to 1 million logic cells and 1.6 million multiplier bits per board. Air Cooled Only.

Provides two QSFP+ interfaces and eight differential LVDS pairs between WILDSTAR™ 3U OpenVPX processing board FPGAs and an external system. It also can provide a 10/100/1000 BASE-T Ethernet for the WILDSTAR OpenVPX motherboard processor. In addition, this RTM provides a bi-directional SMA which can accept single ended clock, trigger or IRIG analog signal and drive out an FPGA trigger.

Provides up to six QSFP+ interfaces, eight single-ended lines and 32 differential LVDS pairs between WILDSTAR™ 6U OpenVPX processing board FPGAs and an external system. It also can provide a 10/100/1000 BASE-T Ethernet, USB and GPIO external interfaces and mSATA internal interface for the WILDSTAR OpenVPX motherboard processor. In addition, this RTM provides a bi-directional SMA which can accept single ended clock, trigger or IRIG analog signal and drive out GPIO or FPGA trigger.

These WILD40 6U EcoSystem™ Rear Transition Modules are compatible with WILDSTAR 7 OpenVPX and WILDSTAR A5 OpenVPX mainboards.