WILD100 14-Slot 3U OpenVPX Chassis – WC31E0
The WILD100 14-Slot 3U OpenVPX Chassis (WC31E0) is a 100Gb Ethernet-enabled COTS rackmount 3U VPX Chassis, Backplane, and Chassis Manager. It is a more capable version of the WILD100 7-Slot 3U OpenVPX Chassis (WC3170).
It is VITA 65 compliant, SOSA-aligned, and designed and built in USA.

The WILD100 14-Slot 3U OpenVPX Chassis includes a Chassis, Backplane, and secure Chassis Manager. Optional FPGA Boards, Switch, Storage, SBC, VITA blocks and cables are also available.
The 14-slot air-cooled Chassis and Backplane incorporates slots for up to eight conduction-cooled 3U VPX Payload Boards, two 100GbE Switches, an SBC, a Radial Clock, and two VITA 62 power supplies.
The Chassis Manager is VITA 46.11/SOSA-aligned and utilizes a Xilinx UltraScale+ ZU5EG MPSoC.
See all of the Annapolis Chassis and Backplanes.
Chassis and Backplane Features
- SOSA-aligned
- Front-loading, air-cooled Chassis with conduction-cooled slots
- Fourteen 3U OpenVPX Slots
- Eight 14.6.11 Primary RF/Compute Intensive profile
- One 14.2.16 I/O Intensive SBC profile
- Two 14.4.14 40/100GbE Switch profiles
- One 14.9.2 Timing profile
- Two VITA 62 Power Supply Slots – Standard or 12V-Heavy
- Input power is 28VDC per MIL-STD-704F
- 25 Gbps Line Rates on Data and Expansion Planes
- 25/40/100Gb Ethernet
- SDR/DDR/QDR/EDR Infiniband
- Gen 3/4 PCI Express
- Custom protocols up to 25Gbps per lane
- SOSA-aligned Backplane profiles
- Payload Profile: SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11-n
- Payload Profile: SLT3-PAY-1F1F2U1TU1T1U1T-14.2.16
- Switch Profile: SLT3-SWH-6F1U7U-14.4.14
- Timing Profile: SLT3x-TIM-2S1U22S1U2U1H-14.9.2
- VITA 66.5C and VITA 67.3C for payload slots
- Integrated ultra-low skew AUXCLK/REFCLK radial distribution
- WABGM0 Chassis manager connector handles JTAG, maintenance ports (UARTs) and control
- Support for CLK1 direct connection between payload slots (2,3,5,6,8,9,11,12) to Chassis Manager FPGA
- I/O Intensive Slot 1 backplane I/O
- GPIO connector for XMC IO, SER01, GPIO and USB 2.0
- USB 3.0 and Display Port Connectors (not available with all temperature options)
- LED Status Indicators
WABGM0 Chassis Manager
- SOSA-aligned and VITA 46.11 compliant
- Front pluggable in SBC Slot 1, plugged directly onto backplane, or cabled
- Xilinx UltraScale+ ZU5EG MPSoC running Linux for CHmC
- Processing Subsystem (PS)
- Quad core A53 ARM running at 1.2 GHz
- Dual core R5 ARM
- 4GB DDR4 DRAM
- 128MB QSPI NOR
- Programmable Logic subsystem (PL)
- 256K System Logic cells in Programmable Logic
- 18Mb of UltraRAM
- 128MB QSPI NOR
- Dual 128KB battery backed NV SRAM
- Processing Subsystem (PS)
- Integrated JTAG access/control from chassis manager to each slot
- External JTAG connection with SW selectable multiplexing from each slot
- Xilinx JTAG over ethernet via Chassis Manager
- Optional MIL-STD-1553 support
- Optional advanced security features
Application Development
- Standard Chassis Manager support delivered with all systems
- IPMI Chassis Manager support with redundant IPMB
- VITA 46.11 conformant and SOSA-aligned
- Tier 2 Chassis Manager supporting Tier 1 and Tier 2 with Tier 3 in process
- Chassis voltage and temperature sensor monitoring
- Fan control and monitoring
- UART support to payload cards
- JTAG support to payload cards
- IPMI Chassis Manager support with redundant IPMB
- Optional Full Board Support Package for Chassis Manager
- Enables customization if needed of Zynq PS, PL
- Provides fast and robust HDL-based application development environment
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Technical Documents
For additional documentation, please contact your Sales Representative.