WILD Chassis Manager – WABGM2

The WILD WABGM2 Chassis Manager is VITA 46.11 conformant and SOSA-aligned, with a MPSoC UltraScale+ FPGA (ZU11EG). It includes an optional 3rd connector which adds 1/10GBASE-T Ethernet, a second MIL-1553 Interface, and three additional Zynq PL HSS.

It is Annapolis-designed, and manufactured in USA.

See also: WABGM0 Chassis Manager

The Chassis Manager is optimized for use with VITA 65/SOSA profiles that define all payload I/O and support backplane Maintenance ports (MP01/MP02) as they provide interfaces to multiplex these and/or export over ethernet allowing for access via chassis manager ethernet connection. An optional Board Support Package (BSP) is available for custom application development and for additional feature support.

General

  • SOSA-aligned VITA 46.11 Chassis Manager
  • Xilinx UltraScale+ ZU11EG MPSoC running Linux for CHmC
    • Processing Subsystem (PS)
      • Quad core A53 ARM running at 1.2 GHz
      • Dual core R5 ARM
      • 4GB DDR4 DRAM
      • 128MB QSPI NOR
    • Programmable Logic subsystem (PL)
      • 633K System Logic cells in Programmable Logic
      • 22.5Mb of UltraRAM
      • 128MB QSPI NOR
      • Dual 128KB battery backed NV SRAM
  • MicroSemi Polarfire MPF200T for security functions
    • 192K Logic Elements
    • 13.3 Mb Internal RAM
    • 297Kb internal uPROM bits
    • Boots from internal flash
    • SPI NOR for in system updates
  • Supports up to 16 slots for JTAG and Maintenance Port Aggregation/muxing
    • Provides 4 sets of MP01/MP02 and 2 sets of JTAG with dedicated select
      lines for each for further muxing on backplane
  • Directly attaches to backplane or carrier card for slot connections
  • Uses backplane only interface for I/O functions

Chassis Support Functions

  • Up to 4 Fan SPD and 1 Fan PWM interface
  • Up to 3 remote temperature sensing interfaces
  • Remote LEDs/Status for OverTemperature, Fan Fail and Power OK
  • SYS_Reset, NVMRO and GDISCRETE inputs
  • Optional security functions for keyfill and zeroize

Other External Connections

  • Optional MIL-1553 interface
  • RS-232 UART for Zynq PS console (PS UART)
  • RS-232 UART for Maintenance port multiplexing (PL UART)
  • Two 10/100/1000 BASE-T interfaces from Zynq PS
  • Supports multiple battery inputs (from backplane or cable)
  • USB 2.0
  • Optional 3rd Connector adds:
    • 1/10GBASE-T Ethernet
    • 2nd MIL-1553 Interface
    • Additional 3 ZYNQ PL HSS

Backplane Management Connections

  • 16 Individual maskable resets/GPIO
  • PS Inhibit/Fail for VITA 62 supplies
  • 4 Maintenance Port 1 interfaces (LVCMOS per SOSA)
  • 4 Maintenance Port 2 interfaces (LVCMOS per SOSA)
  • 2 3.3V JTAG interfaces
  • AUXCLK/REFCLK input
  • 5 ZYNQ PL GPIO (3.3V)
  • 2 10Gbps capable HSS connections to Zynq PL HSS
  • Dual IPMI connections per VITA 46.11
  • GDISCRETE, NVMRO and SYSRESET outputs

Optional Board Support Package (BSP)

  • Zynq and Polarfire development support
  • Enables customization of Zynq PS, PL and Microsemi logic
  • Required for some security functions
  • Order separately using P/N S00000-89

Environmental and Mechanical

  • Only requires 3.3V for operation
    • Designed to run from backplane 3.3VAUX
  • Optional support for -65C to 105C storage temperature
  • Optional support for -55C partial operation
  • Supports 3U and 6U backplanes
    • Does not cover any VITA 66/67 openings allowing for full support
    • Consumes 5 slots of backplane width

The following documentation is available for registered users of our site. Please log in or feel free to register for our site.

Technical Documents

For additional documentation, please contact your Sales Representative.

Product Images