The WILD FMC+ DME1 ADC & DAC supports two 10-bit ADC and DAC channels with sample rates up to 64GSps. The DME1 integrates a Jariet Technologies transceiver and is targeted at demanding applications requiring direct sampling frequency coverage anywhere from 0.1 to 36 GHz, and/or wide instantaneous bandwidths.

Compatible with any WILDSTAR mainboard with a WILD FMC+ slot.

The WILD FMC+ DME1 ADC & DAC allows sample rates as high as 64 GSps and provides up to four channels each (6U) of high speed, precision analog-to-digital and digital-to-analog outputs for a compatible motherboard.

It has a usable analog bandwidth of 36 GHz and a maximum instantaneous bandwidth of 6.4 GHz on both channels simultaneously. All transceiver channels feature onboard digital downconverters (DDCs) and digital upconverters (DUCs), including sub-band channelizers for dynamic frequency selection.

See all of the Annapolis Mezz Cards.


  • ADC and DAC sample rates up to 64.0 GSps!
  • Capability to have two ADC and two DAC channels in one 3U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
  • Capability to have four ADC and four DAC channels in one 6U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
  • Compatible with any WILDSTAR mainboard with a WFMC+ slot
  • Supports JESD204B/C interface with 32 lanes up to 30Gbps
  • Firmware and Software for four channel data transmit interface and clock trigger synchronization provided in CoreFire Next and VHDL source

ADC Performance

  • 64GSps ADC Speed Grade
  • 2 Channels
  • 10 Bits Resolution
  • Analog Bandwidth: 36GHz
  • Run Time Selectable ADC Decimation: 8-1024x
  • Adjustable attenuation: 1-60 dB

DAC Performance

  • 64GSps DAC Speed Grade
  • 2 channels
  • 10 Bits Resolution
  • Analog Bandwidth: 36GHz
  • Run Time Selectable DAC Interpolation: 8-1024x
  • Adjustable attenuation: 1-60 dB

Clock Performance

  • Software-selectable external clock input or onboard PLL clock
  • Run Time Clock Source Selection
    • External Reference Clock
    • Internal PLL with Run Time Selectable Reference Source
      • External RF Connector
      • Internal Oscillator
      • Mainboard/Backplane provided Reference

I/O Connectors

  • Six 50Ω Front Panel or VITA 67 Connectors
    • Two Analog ADC Inputs
    • Two Analog DAC Outputs
    • One External Sample Clock Input
    • One High Precision Trigger Input
      • 2.5V LVPECL
      • 3.3V LVPECL
      • 2.5V LVCMOS
      • 3.3V LVCMOS

Clock Synchronization

  • All ADCs and DACs across multiple mezzanine cards can be synchronized using WILDSTAR Clock Distribution Boards and select WILDSTAR Backplanes

Mechanical and Environmental

  • Integrated Heatsink and EMI / Crosstalk Shieldsw
  • Commercial and Industrial Temperatures Available
  • Air Cooled, Conduction Cooled and Air-Flow-Through Cooled supported

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Technical Documents

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