WILD100 100GbE 6U OpenVPX Test Chassis – WCG000-17

The WILD100 100GbE 6U OpenVPX Test Chassis (WCG000-17) is a 100Gb Ethernet-enabled benchtop 6U VPX Liquid Flow Through (LFT) Chassis, Backplane, Chassis Manager, and integrated conduction-cooled 3U Ethernet/PCIe/LVDS Switch. It supports loopback testing of 6U LFT payload cards and switch modules.

It is VITA 65 compliant and designed and built in USA.

This 10-Slot front-loading test system for VITA 48.4 Liquid Flow Through (LFT) Modules supports 25 Gbps Line Rates on Data and Expansion Planes.

All seven LFT slots (four payload + three switch) are individually plumbed to an external inlet and an external outlet quick disconnect.

See all of the Annapolis Chassis and Backplanes.

Overall System Features

  • Front-loading system for VITA 48.4 Liquid Flow Through (LFT) Modules. Conduction-cooled also available.
  • 10-slot 6U OpenVPX Backplane (W16824)
  • 1400W VITA 62 Power Supply – 12V-Heavy (RB6001-008). One is standard; a second is optional.
  • Supports Three-Phase AC power
  • 25 Gbps Line Rates on Data and Expansion Planes
    • 25/40/100Gb Ethernet
    • Gen 3/4 PCI Express
    • Custom protocols up to 25Gbps per lane
  • VITA 66.5C and VITA 67.3C for payload slots
  • VITA 66.5 Backplane Blocks with Test Loopback Cables are available
  • Integrated ultra-low skew AUXCLK/REFCLK radial distribution
  • Chassis manager connector handles JTAG, maintenance ports (UARTs) and control
  • Connectors: 18x RJ45, 8x USB-A, and 1x LC
  • Power Cable: NEMA L21-30P (Hubbell PN HBL2811) to 4x Positronics PLB3W3F0000/AA with in-line filter and circuit breaker (RH0001-48)
  • All seven LFT slots (four payload + three switch) individually plumbed to an external inlet and an external outlet quick disconnect

WABGS0 Chassis Manager

  • SOSA-aligned and VITA 46.11 conformant
  • Xilinx UltraScale+ ZU5EG MPSoC running Linux for CHmC
  • Integrated JTAG access/control from Chassis Manager to each slot
    • External JTAG connection with SW selectable multiplexing from each slot
    • Xilinx JTAG over ethernet via Chassis Manager

WP3H20 Ethernet/PCIe/LVDS Switch

  • SOSA-aligned
  • Separate Logical Data and Control planes
  • Supports multiple backplane configurations
  • Connector based on VITA 91 for Higher Density VPX Applications
  • Xilinx Zynq UltraScale+ MPSoC Motherboard Controller (XCZU5EG)
    • Quad-core 64-bit ARM® Cortex-A53 running up to 1.2GHz
    • Dual-core 32-bit Cortex-R5 real-time processor running up to 533MHz

Application Development

  • Standard support delivered with all systems

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