VHDL

WILDSTAR 6 VHDL Hardware Interfaces (Full Source Code Provided)

• LAD Bus
• DMA Bus
  • DDR2 SDRAM
  • DDRII/QDRII SRAM
  • Rocket I/O Mezzanine Interface
  • LVDS I/O Mezzanine Interface
• Interfaces between FPGAs
• High Speed Rocket I/O to Backplane
• Basic Board Functions - Clocks, Reset, LEDs

 WILDSTAR 6 VHDL IO Communication Interfaces (Encrypted Cores Provided)

• 1 GbE
• 4x PCI-E Gen2

FPGA VHDL Template

• User VHDL is instantiated into the provided PE top level VHDL model
• User manually includes the supplied Annapolis physical interfaces
• User writes VHDL code to interface to the Annapolis interfaces