WILD100 100GbE SOSA Development Kit – WS3A01-S1

This next-generation 3U OpenVPX Development Kit is both SOSA™-aligned and 100Gb Ethernet capable, and is designed from the ground up to economically speed development of 100GbE Systems. With SOSA Version 1.0 publishing in 2021, this COTS benchtop Kit is timed to facilitate the rapid development and testing of boards and systems that are aligned with this super-standard.

The stock Kit includes a 3U Chassis, Backplane, secure Chassis Manager, FPGA Board with Gen 3 RFSoC Mezz Card, 100GbE Switch, SBC, VITA blocks, and MIL-DTL-38999 cable.

For a virtual or in-person Demo of this Kit, contact us.

Overall System Features

  • Front-loading, air-cooled system with conduction-cooled boards
  • Seven 3U OpenVPX slots with SOSA-aligned backplane profiles
    • One 14.6.11 Payload
    • Three 14.6.11 Empty Payload (available for expansion)
    • One 14.2.16 I/O-intensive SBC
    • One 14.4.14 100GbE Switch
    • One VITA 62 Power Supply – 12V-Heavy
  • Input power is 28VDC per MIL-STD-704F
  • 25 Gbps Line Rates on Data and Expansion Planes
    • 25/40/100Gb Ethernet
    • SDR/DDR/QDR/EDR Infiniband
    • Gen 3/4 PCI Express
    • Custom protocols up to 25Gbps per lane
  • VITA 66.5C and VITA 67.3C for payload slots
  • Integrated ultra-low skew AUXCLK/REFCLK radial distribution
  • Chassis manager connector handles JTAG, maintenance ports (UARTs) and control
  • Four MIL-DTL-38999 SOSA-aligned circular connectors with 19 RF connections, and one MIL-DTL-38999 Breakout Cable
  • LED Status Indicators
  • Multiple levels of hardware and software security

Chassis Manager

  • SOSA-aligned and VITA 46.11 compliant
  • Xilinx UltraScale+ ZU5EG MPSoC running Linux for CHmC
    • Processing Subsystem (PS)
    • Programmable Logic subsystem (PL)
  • Integrated JTAG access/control from Chassis Manager to each slot
    • External JTAG connection with SW selectable multiplexing from each slot
    • Xilinx JTAG over ethernet via Chassis Manager

FPGA Processor With RFSoC I/O Card

  • One Xilinx® Virtex® UltraScale+™ FPGA (XCVU7P)
  • One Xilinx® Zynq® UltraScale+™ MPSoC EV Motherboard Controller (XCZU7EV)
  • VITA 46.11/SOSA IPMC Support
  • Gen 3 RFSoC Card mounted via WILD FMC+ (WFMC+) next generation IO site
    • Integrates Xilinx Zynq UltraScale+ RFSoC FPGA (ZU47DR)
    • Ultra-low latency from ADC RF input to DAC RF output
    • ADC
      • Channels: 4
      • Max Sample Rate: 5.0+GSps
      • Resolution: 14 bit
    • DAC
      • Channels: 4
      • Max Sample Rate: 10.0+GSps
      • Resolution: 14 bit

100Gb Ethernet Switch

  • Separate Data and Control plane switches and control processors
  • Up to ten 40/100Gb and eight 1/10/25Gb Ethernet ports
  • 40/100Gb Ethernet Data Plane Switch
    • Supports 10/25/40/100Gb Ethernet to backplane
    • Supports 1/10/25/40/50 and 100Gb Ethernet to optical interfaces
    • Based on Mellanox Spectrum Switch silicon
    • Industry leading, true cut through latency
    • Optimized for Software Defined Networking
    • 6.4Tb/s switching capacity delivering wire speed performance at all packet sizes and traffic patterns
  • 1/10/25/40/100Gb Ethernet Control Plane Switch
    • Supports 1/10/25Gb Ethernet to backplane
    • Supports 1/10/25/40/50 and 100Gb Ethernet to optional front panel optical interfaces
    • Based on Marvell Prestera-DX Switch silicon
    • Layer-2 Wire-Speed Switching Engine
  • Two Xilinx® Zynq® UltraScale+™ MPSoC Motherboard Controller (XCZU5EG)
    • Quad-core 64-bit ARM® Cortex-A53 running up to 1.2GHz
    • Dual-core 32-bit Cortex-R5 real-time processor running up to 533MHz

I/O-Intensive Single Board Computer

  • Intel® Xeon® D-1559
  • 32G DRAM
  • 60GB M.2 SSD/Linux – Standard

Application Development

  • Standard support delivered with all systems
  • Optional Full Board Support Package for Chassis Manager
    • Enables customization if needed of Zynq PS, PL
    • Provides fast and robust HDL-based application development environment

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Technical Documents

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