WILD FMC+ QM60 ADC & DAC – WWQM60

This high performance WILD FMC+ QM60 ADC & DAC has four input bandwidth options, internal sample clock options and internal 10MHz reference clock options. This card allows for eight ADC and twelve DAC channels in one 6U OpenVPX slot (or four ADC and six DAC channels for 3U) when plugged into WILDSTAR OpenVPX FPGA mainboards. The QM60 also has speed grades up to 6GSps (ADC) and 12GSps (DAC) with a resolution of 12 Bits (ADC) and 16 Bits (DAC) .

Compatible with any WILDSTAR mainboard with a WILD FMC+ slot.

The WILD FMC+ QM60 ADC & DAC allows ADC and DAC sample rates as high as 6GSps and 12GSps, respectively, and provides up to eight channels of high speed, precision analog-to-digital and twelve channels of digital-to-analog converter outputs for a compatible motherboard. It provides excellent analog performance with flexible high-precision trigger options.

See all of the Annapolis Mezz Cards.

General

  • Capability to have four ADC and six DAC channels in one 3U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
  • Capability to have eight ADC and twelve DAC channels in one 6U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
  • Compatible with any WILDSTAR mainboard with a WFMC+ slot
  • Firmware and Software for four channel data transmit interface and clock trigger synchronization provided in CoreFire Next and VHDL source

ADC Performance

  • 6GSps 12b ADC Speed Grade (Analog Devices AD9082)
  • Up to 4 channels
  • Resolution: 12 Bits
  • Analog Bandwidth: >6GHz
  • Run Time Selectable ADC Decimation: 1-40x

DAC Performance

  • 12GSps 16b DAC Speed Grade (Analog Devices AD9082)
  • 6 channels
  • Resolution: 16 Bits
  • Analog Bandwidth: >6GHz
  • Run Time Selectable DAC Interpolation: 1-40x

Clock Performance

  • Software-selectable external clock input or onboard PLL clock
  • Run Time Clock Source Selection
    • External Full Rate Clock
    • Internal PLL with Run Time Selectable Reference Source
      • External RF Connector
      • Internal Oscillator
      • Mainboard/Backplane provided Reference

I/O Connectors

  • Twelve 50Ω Front Panel or VITA 67 Connectors
    • Four Analog ADC Inputs
    • Six Analog DAC Outputs
    • One External Sample Clock Input
    • One High Precision Trigger Input
      • 2.5V LVPECL
      • 3.3V LVPECL
      • 2.5V LVCMOS
      • 3.3V LVCMOS

Clock Synchronization

  • All ADCs and DACs across multiple mezzanine cards can be synchronized using WILDSTAR Clock Distribution Boards and select WILDSTAR Backplanes

Mechanical and Environmental

  • Integrated Heatsink and EMI / Crosstalk Shields
  • Commercial and Industrial Temperatures Available
  • Air Cooled, Conduction Cooled and Air-Flow-Through Cooled supported

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Technical Documents

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