WILD GS0 Chassis Manager / HMC / SoM – WABGS0
The WILD GS0 Chassis Hardware Management Card is our most streamlined VITA 46.11-conformant card. It is cost-efficient and space-optimized; it consumes only three slots of width when mounted to the backplane. It is SOSA-aligned and supports Tier 3 requirements.
It is Annapolis-designed, and manufactured in USA.
See all of our Chassis Managers.
The WILD GS0 HMC (System on Module) is optimized for use with VITA 65/SOSA profiles that define all payload I/O and support backplane Maintenance ports (MP01/MP02) as they provide interfaces to multiplex these and/or export over ethernet allowing for access via chassis manager ethernet connection.
An optional Board Support Package (BSP) enables customization of Zynq Processing Subsystem (PS) and Programmable Logic (PL) for custom application development and for additional feature support.
General
- VITA 46.11-conformant and SOSA™-aligned with Tier 3 support
- Xilinx UltraScale+ ZU5EG MPSoC running Linux for CHmC
- Processing Subsystem (PS)
- Quad core A53 ARM running at 1.2 GHz
- Dual core R5 ARM
- 4GB DDR4 DRAM
- 128MB QSPI NOR
- 32GB SLC eMMC with hardware NVMRO lock
- Programmable Logic subsystem (PL)
- 256K System Logic cells in Programmable Logic
- 18Mb of UltraRAM
- 128MB QSPI NOR
- Dual 128KB battery backed NV SRAM
- Processing Subsystem (PS)
- Multiple Maintenance ports aggregation options
- Twelve slots of direct MP1/MP2 with no backplane logic
- Unused interfaces can be used as 3.3V GPIO
- Up to 24 or 48 slots of MP1/MP2 with backplane mux
- Twelve slots of direct MP1/MP2 with no backplane logic
- Multiple JTAG aggregation options
- Two slots of direct JTAG with no backplane logic
- Unused interfaces can be used as 3.3V GPIO
- Up to 32 slots of JTAG with backplane mux
- Two slots of direct JTAG with no backplane logic
- Directly attaches to backplane
Chassis Support Functions
- Four Fan SPD and two PWM interface
- SYS_Reset, NVMRO and GDISCRETE inputs
Other External Connections
- Optional MIL-1553 interface
- USB 2.0 Host interface
- Dual LVCMOS UARTs
- Supports Zynq PS console for ZYNQ console
- Supports Zynq PL interface Maintenance port multiplexing
- Allows for translation to appropriate external levels at front panel card (i.e. RS232/RS422)
- One 10/100/1000 BASE-T interface from Zynq PS
- One 10/100/1000 BASE-T interface from Zynq PL
Backplane Management Connections
- Two PS Inhibit/Fail sets for VITA 62 supplies
- Twelve Maintenance Port 1 interfaces (LVCMOS per SOSA)
- Twelve Maintenance Port 2 interfaces (LVCMOS per SOSA)
- Up to eight LVDS
- Two 3.3V JTAG interfaces
- AUXCLK/REFCLK input
- 16 GPIO (3.3V)
- Unused JTAG and MP interfaces can be used for additional GPIO
- Three 10Gbps capable HSS connections to Zynq PL HSS
- Defaults to 1Gb Ethernet support
- Dual IPMI connections per VITA 46.11
- GDISCRETE, Maskable Reset and SYSRESET input/outputs
- NVMRO Input
- Three I2C
- Four Temperature Sensing thermistor interfaces
Optional Board Support Package (BSP)
- Zynq development support
- Enables customization of Zynq PS and PL
- Order separately using P/N S00000-7B
Environmental
- Only requires 3.3V for operation
- Designed to run from backplane 3.3VAUX
- Standard: -40 to 85°C Operating & -55 to 105°C Storage
- Available: -55°C Partial Operating
- Available: -62 to 105°C Storage
- Supports 3U and 6U backplanes
- Does not cover any VITA 66/67 openings allowing for full support
- Consumes three slots of backplane width
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Technical Documents
For additional documentation, please contact your Sales Representative.
