WILD CS0 Hybrid PCIe and Ethernet Switch – WABCS0

The WILD CS0 Hybrid PCIe and Ethernet Switch combines PCIe and Ethernet switching into one card.

It is Annapolis-designed, and manufactured in USA.

See all of our Chassis and Backplane Accessories.

WABCS0 combines a Microsemi PCIe Gen3 Switch, a Marvell Prestera DX 1/10/25/40/50/100 GbE Switch, and a Xilinx UltraScale+ ZU5EG MPSoC.

An optional Board Support Package (BSP) enables customization of Zynq Processing Subsystem (PS) and Programmable Logic (PL) for custom application development and for additional feature support.

 

General

  • Includes PCIe and Ethernet switching and UltraScale+ processing
  • Microsemi PCIe Gen3 Switch
  • Marvell Prestera DX 1/10/25/40/50/100 GbE Switch
  • Xilinx UltraScale+ ZU5EG MPSoC running Linux for CHmC
    • Processing Subsystem (PS)
      • Quad core A53 ARM running at 1.2 GHz
      • Dual core R5 ARM
      • 4GB DDR4 DRAM
      • 128MB QSPI NOR
      • 32GB SLC eMMC with hardware NVMRO lock
    • Programmable Logic subsystem (PL)
      • 256K System Logic cells in Programmable Logic
      • 18Mb of UltraRAM
      • 128MB QSPI NOR
      • Dual 128KB battery backed NV SRAM
  • Directly attaches to backplane

1/10/25/40/100Gb Ethernet Control Plane Switch

  • Supports 1/10/25Gb Ethernet to backplane
  • Supports 1/10/25/40/50 and 100Gb Ethernet to optional front panel optical interfaces
  • Based on Marvell Prestera-DX Switch silicon
  • Layer-2 Wire-Speed Switching Engine
    • IEEE 802.1Q-compliant bridging
    • Large Forwarding Database (FDB) providing exact-match lookup for MAC entries, IGMPv3/MLDv2 IP Multicast, FCoE entries, and Router Host entries
  • Supports Transparent Mode Precision Time Protocol (PTP) per IEEE 1588v2 standard
  • Control and Status GUI
  • Optional cut through mode

Gen3 PCI Express Switch

  • Supports 8x and 4x ports
  • Based on Microchip Switchtec™ PFX Switch Silicon
  • Ultra-low latency cut through performance
  • Error Containment
    • Advanced Error Reporting (AER) on all ports
    • Downstream Port Containment (DPC) on all downstream ports
    • Completion Timeout Synthesis (CTS) to prevent an error state in an upstream host due to incomplete non-posted transactions

Optional Board Support Package (BSP)

  • Zynq development support
  • Enables customization of Zynq PS and PL

Environmental

  • Only requires 3.3V for operation
    • Designed to run from backplane 3.3VAUX
  • Standard: -40 to 85°C Operating & -55 to 105°C Storage
  • Available: -55°C Partial Operating
    Supports 3U and 6U backplanes

    • Does not cover any VITA 66/67 openings allowing for full support

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Technical Documents

For additional documentation, please contact your Sales Representative.

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