This high performance Dual 6.0 GSps 12-Bit ADC & DAC WFMC+ has two input bandwidth options, internal sample clock options and internal 10MHz reference clock options.  It allows for ADC and DAC speed grades up to 6GSps. The Dual 6.0 GSps 12-Bit ADC & DAC WFMC+ also gives the user the ability to have up to eight ADC and four DAC channels in one 6U OpenVPX slot.

Compatible with any WILDSTAR mainboard with a WILD FMC+ slot.


The Dual 6.0 GSps 12-Bit ADC & DAC WFMC+ allows sample rates as high as 6.0 GSps and provides two channels of high speed, precision analog-to-digital and digital-to-analog converter outputs for a compatible motherboard. It provides excellent analog performance with flexible high-precision trigger options.

See all of the Annapolis Mezz Cards.



  • Optional ADC Speed Grades.
  • Optional DAC Speed Grades.
  • Capability to have four ADC and two DAC channels in one 3U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
  • Capability to have eight ADC and four DAC channels in one 6U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
  • Compatible with any WILDSTAR mainboard with a WFMC+ slot
  • Firmware and Software for four channel data transmit interface and clock trigger synchronization provided in CoreFire Next and VHDL source

ADC Performance

  • Optional ADC Speed Grades
    • Dual 5.4GSps 12b
    • Dual 6.4GSps 12b
  • Resolution: 12 Bits
  • Analog Bandwidth: Up to 6GHz
  • Optional Decimation: 2x (real), 4/8/16x (complex)
  • Analog and Digital Phase Matched Inputs

DAC Performance

  • Optional DAC Speed Grades
    • Dual 3.0GSps 12b
    • Dual 4.5GSps 12b
    • Dual 6.0GSps 12b
  • Resolution: 12 Bits
  • Run Time Selectable Output Modes
    • NRZ: Non-Return to Zero
    • RTZ: Return to Zero
    • RF: Radio Frequency
    • NRTZ: Narrow Return to Zero
  • Analog Bandwidth: Up to 7GHz
  • Analog and Digital Phase Matched Outputs

Clock Performance

  • Software-selectable external clock input or onboard PLL clock
  • Run Time Clock Source Selection
    • External Full Rate Clock
    • Internal PLL with Run Time Selectable Reference Source
      • External RF Connector
      • Internal Oscillator
      • Mainboard/Backplane provided Reference

I/O Connectors

  • Optional 50Ω Front Panel RF or VITA 67
  • Up to Nine I/O Connectors
    • Up to Four Analog Inputs
    • Two Analog Outputs
    • One Clock Input
    • One External Reference Input
    • One Trigger Input

Clock Synchronization

  • All ADCs and DACs across multiple mezzanine cards can be synchronized using WILDSTAR Clock Distribution Boards and select WILDSTAR Backplanes

Mechanical and Environmental

  • Integrated Heatsink and EMI / Crosstalk Shields
  • Commercial and Industrial Temperatures Available
  • Air, Conduction, and Flow Through Cooling supported

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Technical Documents

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